Part 5: MIPS Instruction Set

In this section, we will describe the encoding format of MIPS assembly instructions, list the most common MIPS instructions, and discuss the anatomy of pseudo-instructions.

MIPS Instruction Formats

In Part 1: Introduction to MIPS Assembly, we discussed that assembly instructions are mnemonics for the combination of 1's and 0's that are defined as machine code instructions.

MIPS Instructions are always 4 bytes (32 bits) in size. To distinguish one instruction from another, several bits out of the 32 are assigned to represent the operation code (opcode), while other bits are assigned to represent the source and destination registers.

These combinations of bits make up several different types of MIPS instruction formats.

They are:

• R Instructions
• I Instructions
• J Instructions

Each instruction format follows a different syntax and encoding which will be described below in big-endian format. This is also described in greater detail from the MIPS Assembly Wikibook here

R Instruction Format

[R]egister instructions have operands that are registers.

An R instruction has the machine-code format:

[ opcode (6 bits) ] [ Rs (5 bits) ] [ Rt (5 bits) ] [ Rd (5 bits) ] [ shift (5 bits) ] [ function code (6 bits) ]

The opcode is the binary representation of the instruction. Related instructions can have the same opcode to which the function code bits of the instruction are used to tell the difference.

For example, add and addu have the same opcode but different function codes.

Rs, Rt, and Rd represent source register, target register, and destination registers respectively.

shift bits are used with the shift instructions and determine the number of shifts to be performed.

R Instructions that do not directly fit the machine-code format and omit bits for example Rd or shift bits will have those bits as all 0's.

For example, jr Rs has the encoding 0000 00ss sss0 0000 0000 0000 0000 1000

An incomplete list of R-type instructions is

• add
• addu
• and
• or
• sll
• jr

An example of an R-type instruction in binary format would be: 0000 0010 0011 0010 1000 0000 0010 0000

And the equivalent assembly instruction is: add $s0, $s1, $s2

I Instruction Format

[I]mmediate instructions have an operand that is an immediate value to be operated onto a register.

An I instruction has the machine-code format:

[ opcode (6 bits) ] [ Rs (5 bits) ] [ Rt (5 bits) ] [ Immediate (16 bits) ]

Just as in R-type instructions, the opcode is the binary representation of the instruction and Rs and Rt represent source register and target register respectively.

The immediate value is also called the offset when it comes to the load instructions.

An incomplete list of I-type instructions are

• beq
• bne
• addi
• lb
• lui

An example of an I instruction in binary format would be: 0010 0011 1011 1101 0000 0000 0000 0100

And the equivalent assembly instruction is: addi $sp, $sp, 4

J Instruction Format

[J]ump instructions describe the format for an instruction where a jump is being performed. Jumps and branches will be described in greater detail in Part 6: Jumps and Branches

A J instruction has the machine-code format:

[ opcode (6 bits) ] [ absolute-address (26 bits) ]

The absolute address is a 26-bit shortened memory address that is the destination of the jump.

An example of a J instruction in binary format would be: 0000 1000 0001 0000 0000 0000 0000 0011

And the equivalent assembly instruction is: j 0x0040000c

MIPS Registers Encoding

Rs, Rt, and Rd are to be substituted with the corresponding MIPS registers $0-$31 in binary.

For example, the instruction: add $s0, $s1, $s2

Using the equivalent register numbers which can be viewed in the table from Part 3: MIPS Registers, the instruction can be read as: add $16, $17, $18

So the encoding will be to convert decimal 16, 17, and 18 to binary to get the encoding for Rd, Rs, and Rt.

MIPS Instruction Set Table

Below is a table with the most common MIPS-32 instructions adapted from the MIPS Assembly Wikibook and from here

To learn the instruction set, I recommend setting up a lab (either MARS, SPIM, or qemu) to test instructions and see what they do.

Pseudo-Instructions

The MIPS instruction set is very minimal thus there are several macros, also known as, pseudo-instructions that the assembler will translate into the corresponding instructions.

When writing MIPS assembly, some assemblers support the usage of certain pseudo-instructions and will convert them to the corresponding assembly instructions.

An example pseudo-instruction is move, the move instruction in MIPS is actually achieved using the add instruction.

So move $s0, $s2 translates to => add $s0, $s2, $zero

Another common pseudo-instruction often seen in disassembly is: la $a0, 0x7fffffff

The load address (la) instruction is actually represented by two MIPS instructions:

1. lui $a0, 0x7fff - (load upper 2 bytes of address)
2. ori $a0, $a0, 0xffff - (load lower 2 bytes of address)

For more examples of pseudo-instructions, visit the link here

Further Reading

1. MIPS Instruction Reference (UIdaho)

2. Programmed Introduction to MIPS Assembly Language (Central Connecticut State University)

3. MIPT-ILAB MIPS Pseudo Instructions Git Wiki

Part 6: Jumps and Branches